Panasonic MN103001G/F01K User Manual download pdf (Page 119)

100

101

Bus Controller (BC)

8-5

8.5 Pin Functions

The external pin functions relating to the bus controller are shown in Table 8-5-1.

Table 8-5-1 External Pin Functions Relating to the Bus Controller

Pin name Input/output

Number of pins

Function

OSCI Input 1 Oscillator input pin (when using PLL: 8 MHz to 18 MHz; when

not using PLL: 8 MHz to 20 MHz)

OSCO Output 1 Oscillator output pin (when using PLL: 8 MHz to 18 MHz; when

not using PLL: 8 MHz to 20 MHz)

CKSEL Input 1 Using PLL setting

(H: Using; L: Not using)

MMOD1 to 0 Input 2 Memory mode setting signals

EXMOD1 to 0 Input 2 External bus pin mode setting signals

SYSCLK Output 1 System clock output

A23 to 0 Output 24 Memory address output (Row/column address multiplexed output

when DRAM is connected)

D15 to 0 Input/output 16 Memory data input/output

RAS 2 to 1 Output 2 DRAM RAS signals

CAS Output 1 DRAM CAS signal for 2WE (WE1 to 0 )

DCAS1 to 0 Output 2 DRAM CAS signals for 2 CAS

DWE Output 1 DRAM WE signal for 2 CAS

CS3 to 0 Output 4 Chip select signals

RE Output 1 Memory read signal

WE1 to 0 Output 2 Memory write signals (output in byte units)

DK Input 1 Data acknowledge signal

BR Input 1 Bus authority request signal

BG Output 1 Bus authority release signal

ADM15 to 0 Input/output 16 Memory data/memory address input/output (memory address

outputs A15 to 0 and memory data D15 to 0 share the same pins)

AS Output 1 Address strobe signal

RWSEL Output 1 Read/write select

Note: WE1 corresponds to D15 to 8, and WE0 corresponds to D7 to 0.

CS2 to 1 and RAS2 to 1, CS3 and A23, CAS and A22, AS and D0, RWSEL and D1, and A15 to 0 and

ADM15 to 0 are shared pins.

1 2 ... 114 115 116 117 118 119 120 121 122 123 124 ... 465 466

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Panasonic MN103001G/F01K User Manual Page 119

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