Panasonic MN103001G/F01K User Manual download pdf (Page 165)

Bus Controller (BC)

8-51

8.13.9 16-bit Bus in Asynchronous Mode and in Address/Data Multiplex Mode

By setting the mode through the MMOD1 and 0 pins and the EXMOD1 and 0 pins, blocks 0 to 3 use multiplex pins

for the memory address and memory data signals (pins ADM15 to 0).

Asynchronous mode is used for accessing external memory at high speed; the address signals, CS signals, etc., are

output asynchronously with SYSCLK but in synchronization with the internal MCLK. In asynchronous mode,

accesses are all by fixed wait insertion.

The various parameters for external memory access are set in memory control registers 0 to 3, corresponding to

each block.

Fig. 8-13-23 is the timing chart in the case of a “16-bit bus in asynchronous mode, in address/data multiplex mode.”

As shown in the timing chart, the ADM15 to 0 pins go to “Hi-Z” or the undefined output state while CSn is negated

in address/data multiplex mode. When the bus authority is released, the ADM15 to 0 pins are either pulled up or go

to “Hi-Z”, depending on the setting of the I/O port output mode register.

Note that when writing to byte 0, WE0 is asserted and the data is output on ADM7 to 0, and when writing to byte 1,

WE1 is asserted and the data is output on ADM15 to 8.

In addition, in the case of a word access (32 bits), the external access is performed twice with A[1] = “0” and A[1]

= “1”.

Note: For details on the mode settings, refer to Table 8-9-1, “Mode Settings by the BC External Pins.”

Note: “0” (low level) is output on pins A23 to 16 (A23 also serves as CS3) while the ADM15 to 0 pins function as

data pins. Therefore, refer to 3. in section 8.16, “Cautions,” regarding the use of these pins.

Fig. 8-13-23 Access Timing on a 16-bit Bus in Asynchronous Mode and in Address/Data Multiplex

Mode (MCLK = SYSCLK multiplied by 4)

For details on the various timing settings, refer to the description of the memory control register in section 8.6,

“Description of Registers.”

CSn

ASA

ADE

RWSEL

MCLK

SYSCLK

A23* to 16

ADM15 to 0

WEn

BCE

ASN

ASA

ADE

ASN

REN

WEN

Read

Write

data in

addr

“0”( )“L” addr

addr

data out

addr

: Undefined

: A23 also serves as CS3

: Undefined or Hi-Z

“0”( )“L”

1 2 ... 160 161 162 163 164 165 166 167 168 169 170 ... 465 466

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Panasonic MN103001G/F01K User Manual Page 165

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